VHDL Primer and Resources
VHDL is a hardware description language(HDL). An HDL looks a bit like a programming language, but has a different purpose. Rather than being used to design software, an HDL is used to define a computer chip. VHDL can be used to describe any type of circuitry and is frequently used in the design, simulation, and testing of processors, CPUs, mother boards, FPGAs, ASICs, and many other types of digital circuitry.
The name VHDL is a nested acronym. It stands for VHSIC Hardware Description Language. VHSIC stands for Very High Speed Integrated Circuit. Besides being a description of a fast processor, it was the name of a US Governement program in the 1980s whose mission was research and development in the field of very high speed integrated circuits (fast computer chips).
Along with major advancements in materials science, algorithms, chip design, lithography, and a dozen other related fields, VHSIC developed VHDL.
The first official standard for the language came from the IEEE in 1987, and is known as IEEE 1076. There have been several editions since then, the latest coming in 2008. In addition to the "core" language specified in 1076, there are a number of extensions codified in other specs:
- IEEE 1076.1 VHDL Analog and Mixed-Signal (VHDL-AMS)
- IEEE 1076.1.1 VHDL-AMS Standard Packages (stdpkgs)
- IEEE 1076.2 VHDL Math Package
- IEEE 1076.3 VHDL Synthesis Package (vhdlsynth)
- IEEE 1076.3 VHDL Synthesis Package - Floating Point (fphdl)
- IEEE 1076.4 Timing (VHDL Initiative Towards ASIC Libraries: vital)
- IEEE 1076.6 VHDL Synthesis Interoperability
- IEEE 1164 VHDL Multivalue Logic (std_logic_1164) Packages
VHDL Design and Syntax
VHDL was based on Ada, and borrowed from it extensively in both syntax and concepts. This was then supplemented with hardware-specific concepts like multi-valued logic, physical parallelism, and an extended set of boolean operators. VHDL can also index arrays in both ascending and descending order, whereas Ada (and most other programming languages as well) only index in ascending order.
Most programming languages are, at heart, procedural — the computer executes one command after another in sequence. VHDL is different. It is a hardware language that describes a (real or simulated) physical structure. That structure is made up of a large number of modules, and each module acts at the same time as every other module.
So, within each module there is a procedural flow of instructions that looks somewhat like a small, self-contained software program — with variables, control flows, conditionals, loops. Each module has one or more inputs along with one or more outputs. The inputs are specified within a structure called an entity, and the self-contained logic is defined in an architecture.
Consider the idea of an "AND gate" where we have two inputs and one output. If both the inputs are "on" (true, 1), then the output is "on"; otherwise, the output is "off." So using VHDL, we would define two inputs and one output. The accepted values of those inputs and outputs would be defined in a
std_logic module, which is imported like a library in a regular programming language. The architecture would then define the internal workings of our "AND gate" so that it works as we just discussed.
std_logic module is an interesting hardware specific type of value. It is similar to the BOOLEAN value present in programming languages (one bit: true or false), but it can have a range of values, since it represents an actual electrical impulse in a physical system:
U: uninitialized. This signal hasn't been set yet.
X: unknown. Impossible to determine this value/result.
0: logic 0
1: logic 1
Z: High Impedance
W: Weak signal, can't tell if it should be 0 or 1.
L: Weak signal that should probably go to 0
H: Weak signal that should probably go to 1
-: Don't care.
This is, in miniature, how a full VHDL design is built. Fairly simple, logically self-contained modules of I/O activity are built up and connected to each other to form computational machines capable of performing different types of tasks. A VHDL design could describe a fully-functioning general-purpose computer, or it could encode an single algorithm such as the brute-force proof-of-work used for Bitcoin mining.
It's important to realize that a VHDL design is not a program — it is not run or executed. Like a blueprint, it defines an architecture. Once a design is completed it is usually simulated for testing in a software testbench, and then synthesized, which means that it is translated into a physical design which can be implemented on an actual chip or circuit board.
Resources for Learning VHDL
There are a lot of resources for learning VHDL. We've put together some of the best.
- VHDL Primer: a tutorial on VHDL from the University of Pennsylvania.
- VHDL on Wikipedia: Wikipedia's coverage of VHDL is surprising in-depth and lucid, providing a great introduction to the language as a whole.
- VHDL Cookbook: a free, online book, the length and format of a college course textbook.
- VHDL Tutorial: Learn by Example: this venerable tutorial is nothing nice to look at, but the information is great and very well organized.
- VHDL Language Guide: this is a PDF that covers the language in immense detail (400 pages) with in-document links for very easy navigation. This is a great reference.
- Designer's Guide to VHDL: a collection of resources, tutorials, and links. Includes videos and an online certification course.
- Programmable Logic/VHDL Module Structure
- VHDL Basics — Online Course
- VHDL Handbook
- VHDL Starters Guide
All these books focus on VHDL:
- The Designer's Guide to VHDL, Third Edition
- Circuit Design and Simulation with VHDL
- Vhdl By Example
- VHDL: Basics to Programming
- VHDL for Engineers
- VHDL By Example: Fundamentals of Digital Design
- Circuit Design with VHDL
- Digital Design Using VHDL: A Systems Approach
VHDL & Verilog Books
VHDL's main "competition" is Verilog. Both languages are used for hardware design, so there are a number of books that focus on underlying design and engineering concepts and use both VHDL and Verilog.
- Digital Design with RTL Design, VHDL, and Verilog
- Hdl Chip Design: A Practical Guide for Designing, Synthesizing & Simulating Asics & Fpgas Using Vhdl or Verilog
- Design Recipes for FPGAs, Second Edition: Using Verilog and VHDL
- HDL Programming Fundamentals: VHDL and Verilog
Other Important VHDL Links
Implementations and Simulators
- Free / Open Source
- Commercial / Proprietary
- EDA Utils: a large collection of utilities for working with VHDL, as well as Verilog and other HDLs.
- EDA Playground: an online sandbox for testing out VHDL designs.
- Editor Packages